Edautils

edautils provides a correct-by-construct ip packaging and integration methodologies along with a set of utilities that transforms the quality and efficiency of your soc designs in order of magnitudes. many of the tools and utilities which often is not available as product from eda vendors. though these tools are not very compute intensive and neither these are algorithmically very challenging but most of the frontend designers often need many of these during their design cycle. all these applications are highly configurable and also available as library to meet custom requirements. the entire edautils' solutions is classified into the below three categories. baya- soc integration platform ------------------------------------------ developed in collaboration with semiconductor companies servicing the consumer market. the objective of this automation is to reduce the rtl generation effort for fpga, subsystem or soc platform and derivative designs by more than an order of magnitude, while